1 {-# LANGUAGE TemplateHaskell, DeriveDataTypeable #-}
3 module CLasH.HardwareTypes
5 , module Data.Param.Integer
6 , module Data.Param.Vector
7 , module Data.Param.Index
8 , module Data.Param.Signed
9 , module Data.Param.Unsigned
12 , module Language.Haskell.TH.Lift
24 import qualified Prelude as P
25 import Prelude (Bool(..),Num(..),Eq(..),Ord(..),snd,fst,otherwise,(&&),(||),not)
27 import Data.Param.Integer (HWBits(..))
28 import Data.Param.Vector
29 import Data.Param.Index
30 import Data.Param.Signed
31 import Data.Param.Unsigned
32 import Data.Bits hiding (shiftL,shiftR)
34 import Language.Haskell.TH.Lift
37 newtype State s = State s deriving (P.Show)
41 deriving (P.Show, Eq, P.Read, Typeable)
45 hwand :: Bit -> Bit -> Bit
46 hwor :: Bit -> Bit -> Bit
47 hwxor :: Bit -> Bit -> Bit
50 High `hwand` High = High
57 High `hwxor` Low = High
58 Low `hwxor` High = High
64 type RAM s a = Vector s a
65 type MemState s a = State (RAM s a)
75 blockRAM (State mem) data_in rdaddr wraddr wrenable =
76 ((State mem'), data_out)
79 -- Only write data_in to memory if write is enabled
80 mem' = if wrenable then
81 replace mem wraddr data_in