1 {-# LANGUAGE TemplateHaskell, DeriveDataTypeable, FlexibleContexts, TypeFamilies, TypeOperators #-}
3 module CLasH.HardwareTypes
5 , module Data.Param.TFVec
6 , module Data.RangedWord
8 , module Data.SizedWord
22 import qualified Prelude as P
23 import Prelude hiding (
24 null, length, head, tail, last, init, take, drop, (++), map, foldl, foldr,
25 zipWith, zip, unzip, concat, reverse, iterate )
27 import qualified Data.Param.TFVec as TFVec
28 import Data.Param.TFVec hiding (TFVec)
29 import Data.RangedWord
33 import Language.Haskell.TH.Lift
36 newtype State s = State s deriving (P.Show)
38 type Vector = TFVec.TFVec
42 deriving (P.Show, P.Eq, P.Read, Typeable)
46 hwand :: Bit -> Bit -> Bit
47 hwor :: Bit -> Bit -> Bit
48 hwxor :: Bit -> Bit -> Bit
51 High `hwand` High = High
58 High `hwxor` Low = High
59 Low `hwxor` High = High
65 type RAM s a = Vector (s :+: D1) a
67 type MemState s a = State (RAM s a)
72 ,((s :+: D1) :>: s) ~ True ) =>
79 blockRAM (State mem) data_in rdaddr wraddr wrenable =
80 ((State mem'), data_out)
83 -- Only write data_in to memory if write is enabled
84 mem' = case wrenable of
86 High -> replace mem wraddr data_in