1 module Main(main) where
4 import qualified CoreUtils
8 import qualified DataCon
10 import qualified Module
11 import qualified Control.Monad.State as State
14 import NameEnv ( lookupNameEnv )
15 import HscTypes ( cm_binds, cm_types )
16 import MonadUtils ( liftIO )
17 import Outputable ( showSDoc, ppr )
18 import GHC.Paths ( libdir )
19 import DynFlags ( defaultDynFlags )
22 import qualified Monad
24 -- The following modules come from the ForSyDe project. They are really
25 -- internal modules, so ForSyDe.cabal has to be modified prior to installing
26 -- ForSyDe to get access to these modules.
27 import qualified ForSyDe.Backend.VHDL.AST as AST
28 import qualified ForSyDe.Backend.VHDL.Ppr
29 import qualified ForSyDe.Backend.VHDL.FileIO
30 import qualified ForSyDe.Backend.Ppr
31 -- This is needed for rendering the pretty printed VHDL
32 import Text.PrettyPrint.HughesPJ (render)
36 defaultErrorHandler defaultDynFlags $ do
37 runGhc (Just libdir) $ do
38 dflags <- getSessionDynFlags
39 setSessionDynFlags dflags
40 --target <- guessTarget "adder.hs" Nothing
41 --liftIO (print (showSDoc (ppr (target))))
42 --liftIO $ printTarget target
45 --core <- GHC.compileToCoreSimplified "Adders.hs"
46 core <- GHC.compileToCoreSimplified "Adders.hs"
47 --liftIO $ printBinds (cm_binds core)
48 let binds = Maybe.mapMaybe (findBind (cm_binds core)) ["shalf_adder"]
49 liftIO $ printBinds binds
50 -- Turn bind into VHDL
51 let (vhdl, sess) = State.runState (mkVHDL binds) (VHDLSession 0 [])
52 liftIO $ putStr $ render $ ForSyDe.Backend.Ppr.ppr vhdl
53 liftIO $ ForSyDe.Backend.VHDL.FileIO.writeDesignFile vhdl "../vhdl/vhdl/output.vhdl"
54 liftIO $ putStr $ "\n\nFinal session:\n" ++ show sess
57 -- Turns the given bind into VHDL
59 -- Add the builtin functions
60 mapM (uncurry addFunc) builtin_funcs
61 -- Create entities and architectures for them
62 units <- mapM expandBind binds
63 return $ AST.DesignFile
67 printTarget (Target (TargetFile file (Just x)) obj Nothing) =
70 printBinds [] = putStr "done\n\n"
71 printBinds (b:bs) = do
76 printBind (NonRec b expr) = do
80 printBind (Rec binds) = do
82 foldl1 (>>) (map printBind' binds)
84 printBind' (b, expr) = do
85 putStr $ getOccString b
86 putStr $ showSDoc $ ppr expr
89 findBind :: [CoreBind] -> String -> Maybe CoreBind
90 findBind binds lookfor =
91 -- This ignores Recs and compares the name of the bind with lookfor,
92 -- disregarding any namespaces in OccName and extra attributes in Name and
96 NonRec var _ -> lookfor == (occNameString $ nameOccName $ getName var)
100 SignalNameMap -- The port name to bind to
102 -- The signal or port to bind to it
103 -> AST.AssocElem -- The resulting port map entry
105 -- Accepts a port name and an argument to map to it.
106 -- Returns the appropriate line for in the port map
107 getPortMapEntry (Single (portname, _)) (Single (signame, _)) =
108 (Just portname) AST.:=>: (AST.ADName (AST.NSimple signame))
110 [(CoreBndr, SignalNameMap)]
111 -- A list of bindings in effect
112 -> CoreExpr -- The expression to expand
114 [AST.SigDec], -- Needed signal declarations
115 [AST.ConcSm], -- Needed component instantations and
116 -- signal assignments.
117 [SignalNameMap], -- The signal names corresponding to
118 -- the expression's arguments
119 SignalNameMap) -- The signal names corresponding to
120 -- the expression's result.
121 expandExpr binds lam@(Lam b expr) = do
122 -- Generate a new signal to which we will expect this argument to be bound.
123 signal_name <- uniqueName ("arg_" ++ getOccString b)
124 -- Find the type of the binder
125 let (arg_ty, _) = Type.splitFunTy (CoreUtils.exprType lam)
126 -- Create signal names for the binder
127 let arg_signal = getPortNameMapForTy ("xxx") arg_ty
128 -- Create the corresponding signal declarations
129 let signal_decls = mkSignalsFromMap arg_signal
130 -- Add the binder to the list of binds
131 let binds' = (b, arg_signal) : binds
132 -- Expand the rest of the expression
133 (signal_decls', statements', arg_signals', res_signal') <- expandExpr binds' expr
134 -- Properly merge the results
135 return (signal_decls ++ signal_decls',
137 arg_signal : arg_signals',
140 expandExpr binds (Var id) =
141 return ([], [], [], bind)
143 -- Lookup the id in our binds map
144 bind = Maybe.fromMaybe
145 (error $ "Argument " ++ getOccString id ++ "is unknown")
148 expandExpr binds l@(Let (NonRec b bexpr) expr) = do
149 (signal_decls, statements, arg_signals, res_signals) <- expandExpr binds bexpr
150 let binds' = (b, res_signals) : binds
151 (signal_decls', statements', arg_signals', res_signals') <- expandExpr binds' expr
153 signal_decls ++ signal_decls',
154 statements ++ statements',
158 expandExpr binds app@(App _ _) = do
159 -- Is this a data constructor application?
160 case CoreUtils.exprIsConApp_maybe app of
161 -- Is this a tuple construction?
162 Just (dc, args) -> if DataCon.isTupleCon dc
164 expandBuildTupleExpr binds (dataConAppArgs dc args)
166 error "Data constructors other than tuples not supported"
168 -- Normal function application, should map to a component instantiation
169 let ((Var f), args) = collectArgs app in
170 expandApplicationExpr binds (CoreUtils.exprType app) f args
172 expandExpr binds expr@(Case (Var v) b _ alts) =
174 [alt] -> expandSingleAltCaseExpr binds v b alt
175 otherwise -> error $ "Multiple alternative case expression not supported: " ++ (showSDoc $ ppr expr)
177 expandExpr binds expr@(Case _ b _ _) =
178 error $ "Case expression with non-variable scrutinee not supported: " ++ (showSDoc $ ppr expr)
180 expandExpr binds expr =
181 error $ "Unsupported expression: " ++ (showSDoc $ ppr $ expr)
183 -- Expands the construction of a tuple into VHDL
184 expandBuildTupleExpr ::
185 [(CoreBndr, SignalNameMap)]
186 -- A list of bindings in effect
187 -> [CoreExpr] -- A list of expressions to put in the tuple
188 -> VHDLState ( [AST.SigDec], [AST.ConcSm], [SignalNameMap], SignalNameMap)
190 expandBuildTupleExpr binds args = do
191 -- Split the tuple constructor arguments into types and actual values.
192 -- Expand each of the values in the tuple
193 (signals_declss, statementss, arg_signalss, res_signals) <-
194 (Monad.liftM List.unzip4) $ mapM (expandExpr binds) args
195 if any (not . null) arg_signalss
196 then error "Putting high order functions in tuples not supported"
199 concat signals_declss,
204 -- Expands the most simple case expression that scrutinizes a plain variable
205 -- and has a single alternative. This simple form currently allows only for
206 -- unpacking tuple variables.
207 expandSingleAltCaseExpr ::
208 [(CoreBndr, SignalNameMap)]
209 -- A list of bindings in effect
210 -> Var.Var -- The scrutinee
211 -> CoreBndr -- The binder to bind the scrutinee to
212 -> CoreAlt -- The single alternative
213 -> VHDLState ( [AST.SigDec], [AST.ConcSm], [SignalNameMap], SignalNameMap)
216 expandSingleAltCaseExpr binds v b alt@(DataAlt datacon, bind_vars, expr) =
217 if not (DataCon.isTupleCon datacon)
219 error $ "Dataconstructors other than tuple constructors not supported in case pattern of alternative: " ++ (showSDoc $ ppr alt)
222 -- Lookup the scrutinee (which must be a variable bound to a tuple) in
223 -- the existing bindings list and get the portname map for each of
225 Tuple tuple_ports = Maybe.fromMaybe
226 (error $ "Case expression uses unknown scrutinee " ++ getOccString v)
228 -- TODO include b in the binds list
229 -- Merge our existing binds with the new binds.
230 binds' = (zip bind_vars tuple_ports) ++ binds
232 -- Expand the expression with the new binds list
233 expandExpr binds' expr
235 expandSingleAltCaseExpr _ _ _ alt =
236 error $ "Case patterns other than data constructors not supported in case alternative: " ++ (showSDoc $ ppr alt)
239 -- Expands the application of argument to a function into VHDL
240 expandApplicationExpr ::
241 [(CoreBndr, SignalNameMap)]
242 -- A list of bindings in effect
243 -> Type -- The result type of the function call
244 -> Var.Var -- The function to call
245 -> [CoreExpr] -- A list of argumetns to apply to the function
246 -> VHDLState ( [AST.SigDec], [AST.ConcSm], [SignalNameMap], SignalNameMap)
248 expandApplicationExpr binds ty f args = do
249 let name = getOccString f
250 -- Generate a unique name for the application
251 appname <- uniqueName ("app_" ++ name)
252 -- Lookup the hwfunction to instantiate
253 HWFunction vhdl_id inports outport <- getHWFunc (appToHsFunction f args ty)
254 -- Expand each of the args, so each of them is reduced to output signals
255 (arg_signal_decls, arg_statements, arg_res_signals) <- expandArgs binds args
256 -- Bind each of the input ports to the expanded arguments
257 let inmaps = concat $ zipWith createAssocElems inports arg_res_signals
258 -- Create signal names for our result
259 let res_signal = getPortNameMapForTy (appname ++ "_out") ty
260 -- Create the corresponding signal declarations
261 let signal_decls = mkSignalsFromMap res_signal
262 -- Bind each of the output ports to our output signals
263 let outmaps = mapOutputPorts outport res_signal
264 -- Instantiate the component
265 let component = AST.CSISm $ AST.CompInsSm
266 (AST.unsafeVHDLBasicId appname)
267 (AST.IUEntity (AST.NSimple vhdl_id))
268 (AST.PMapAspect (inmaps ++ outmaps))
269 -- Merge the generated declarations
271 signal_decls ++ arg_signal_decls,
272 component : arg_statements,
273 [], -- We don't take any extra arguments; we don't support higher order functions yet
276 -- Creates a list of AssocElems (port map lines) that maps the given signals
277 -- to the given ports.
279 SignalNameMap -- The port names to bind to
280 -> SignalNameMap -- The signals to bind to it
281 -> [AST.AssocElem] -- The resulting port map lines
283 createAssocElems (Single (port_id, _)) (Single (signal_id, _)) =
284 [(Just port_id) AST.:=>: (AST.ADName (AST.NSimple signal_id))]
286 createAssocElems (Tuple ports) (Tuple signals) =
287 concat $ zipWith createAssocElems ports signals
289 -- Generate a signal declaration for a signal with the given name and the
290 -- given type and no value. Also returns the id of the signal.
291 mkSignal :: String -> AST.TypeMark -> (AST.VHDLId, AST.SigDec)
293 (id, mkSignalFromId id ty)
295 id = AST.unsafeVHDLBasicId name
297 mkSignalFromId :: AST.VHDLId -> AST.TypeMark -> AST.SigDec
298 mkSignalFromId id ty =
299 AST.SigDec id ty Nothing
301 -- Generates signal declarations for all the signals in the given map
306 mkSignalsFromMap (Single (id, ty)) =
307 [mkSignalFromId id ty]
309 mkSignalsFromMap (Tuple signals) =
310 concat $ map mkSignalsFromMap signals
313 [(CoreBndr, SignalNameMap)] -- A list of bindings in effect
314 -> [CoreExpr] -- The arguments to expand
315 -> VHDLState ([AST.SigDec], [AST.ConcSm], [SignalNameMap])
316 -- The resulting signal declarations,
317 -- component instantiations and a
318 -- VHDLName for each of the
319 -- expressions passed in.
320 expandArgs binds (e:exprs) = do
321 -- Expand the first expression
322 (signal_decls, statements, arg_signals, res_signal) <- expandExpr binds e
323 if not (null arg_signals)
324 then error $ "Passing functions as arguments not supported: " ++ (showSDoc $ ppr e)
326 (signal_decls', statements', res_signals') <- expandArgs binds exprs
328 signal_decls ++ signal_decls',
329 statements ++ statements',
330 res_signal : res_signals')
332 expandArgs _ [] = return ([], [], [])
334 -- Extract the arguments from a data constructor application (that is, the
335 -- normal args, leaving out the type args).
336 dataConAppArgs :: DataCon -> [CoreExpr] -> [CoreExpr]
337 dataConAppArgs dc args =
340 tycount = length $ DataCon.dataConAllTyVars dc
343 SignalNameMap -- The output portnames of the component
344 -> SignalNameMap -- The output portnames and/or signals to map these to
345 -> [AST.AssocElem] -- The resulting output ports
347 -- Map the output port of a component to the output port of the containing
349 mapOutputPorts (Single (portname, _)) (Single (signalname, _)) =
350 [(Just portname) AST.:=>: (AST.ADName (AST.NSimple signalname))]
352 -- Map matching output ports in the tuple
353 mapOutputPorts (Tuple ports) (Tuple signals) =
354 concat (zipWith mapOutputPorts ports signals)
357 CoreBind -- The binder to expand into VHDL
358 -> VHDLState [AST.LibraryUnit] -- The resulting VHDL
360 expandBind (Rec _) = error "Recursive binders not supported"
362 expandBind bind@(NonRec var expr) = do
363 -- Create the function signature
364 hwfunc <- mkHWFunction bind
365 let ty = CoreUtils.exprType expr
366 let hsfunc = mkHsFunction var ty
367 -- Add it to the session
368 addFunc hsfunc hwfunc
369 arch <- getArchitecture hwfunc expr
370 let entity = getEntity hwfunc
376 HWFunction -- The function to generate an architecture for
377 -> CoreExpr -- The expression that is bound to the function
378 -> VHDLState AST.ArchBody -- The resulting architecture
380 getArchitecture hwfunc expr = do
382 let HWFunction vhdl_id inports outport = hwfunc
383 -- Expand the expression into an architecture body
384 (signal_decls, statements, arg_signals, res_signal) <- expandExpr [] expr
385 let inport_assigns = concat $ zipWith createSignalAssignments arg_signals inports
386 let outport_assigns = createSignalAssignments outport res_signal
387 return $ AST.ArchBody
388 (AST.unsafeVHDLBasicId "structural")
389 (AST.NSimple vhdl_id)
390 (map AST.BDISD signal_decls)
391 (inport_assigns ++ outport_assigns ++ statements)
393 -- Generate a VHDL entity declaration for the given function
394 getEntity :: HWFunction -> AST.EntityDec
395 getEntity (HWFunction vhdl_id inports outport) =
396 AST.EntityDec vhdl_id ports
399 (concat $ map (mkIfaceSigDecs AST.In) inports)
400 ++ mkIfaceSigDecs AST.Out outport
403 AST.Mode -- The port's mode (In or Out)
404 -> SignalNameMap -- The ports to generate a map for
405 -> [AST.IfaceSigDec] -- The resulting ports
407 mkIfaceSigDecs mode (Single (port_id, ty)) =
408 [AST.IfaceSigDec port_id mode ty]
410 mkIfaceSigDecs mode (Tuple ports) =
411 concat $ map (mkIfaceSigDecs mode) ports
413 -- Create concurrent assignments of one map of signals to another. The maps
414 -- should have a similar form.
415 createSignalAssignments ::
416 SignalNameMap -- The signals to assign to
417 -> SignalNameMap -- The signals to assign
418 -> [AST.ConcSm] -- The resulting assignments
420 -- A simple assignment of one signal to another (greatly complicated because
421 -- signal assignments can be conditional with multiple conditions in VHDL).
422 createSignalAssignments (Single (dst, _)) (Single (src, _)) =
425 src_name = AST.NSimple src
426 src_expr = AST.PrimName src_name
427 src_wform = AST.Wform [AST.WformElem src_expr Nothing]
428 dst_name = (AST.NSimple dst)
429 assign = dst_name AST.:<==: (AST.ConWforms [] src_wform Nothing)
431 createSignalAssignments (Tuple dsts) (Tuple srcs) =
432 concat $ zipWith createSignalAssignments dsts srcs
434 createSignalAssignments dst src =
435 error $ "Non matching source and destination: " ++ show dst ++ "\nand\n" ++ show src
437 type SignalNameMap = HsValueMap (AST.VHDLId, AST.TypeMark)
439 -- | A datatype that maps each of the single values in a haskell structure to
440 -- a mapto. The map has the same structure as the haskell type mapped, ie
441 -- nested tuples etc.
442 data HsValueMap mapto =
443 Tuple [HsValueMap mapto]
447 -- | Creates a HsValueMap with the same structure as the given type, using the
448 -- given function for mapping the single types.
450 (Type -> HsValueMap mapto) -- ^ A function to map single value Types
451 -- (basically anything but tuples) to a
452 -- HsValueMap (not limited to the Single
454 -> Type -- ^ The type to map to a HsValueMap
455 -> HsValueMap mapto -- ^ The resulting map
458 case Type.splitTyConApp_maybe ty of
459 Just (tycon, args) ->
460 if (TyCon.isTupleTyCon tycon)
462 -- Handle tuple construction especially
463 Tuple (map (mkHsValueMap f) args)
465 -- And let f handle the rest
467 -- And let f handle the rest
470 -- Generate a port name map (or multiple for tuple types) in the given direction for
472 getPortNameMapForTys :: String -> Int -> [Type] -> [SignalNameMap]
473 getPortNameMapForTys prefix num [] = []
474 getPortNameMapForTys prefix num (t:ts) =
475 (getPortNameMapForTy (prefix ++ show num) t) : getPortNameMapForTys prefix (num + 1) ts
477 getPortNameMapForTy :: String -> Type -> SignalNameMap
478 getPortNameMapForTy name ty =
479 if (TyCon.isTupleTyCon tycon) then
480 -- Expand tuples we find
481 Tuple (getPortNameMapForTys name 0 args)
482 else -- Assume it's a type constructor application, ie simple data type
483 Single ((AST.unsafeVHDLBasicId name), (vhdl_ty ty))
485 (tycon, args) = Type.splitTyConApp ty
487 data HWFunction = HWFunction { -- A function that is available in hardware
488 vhdlId :: AST.VHDLId,
489 inPorts :: [SignalNameMap],
490 outPort :: SignalNameMap
491 --entity :: AST.EntityDec
494 -- Turns a CoreExpr describing a function into a description of its input and
497 CoreBind -- The core binder to generate the interface for
498 -> VHDLState HWFunction -- The function interface
500 mkHWFunction (NonRec var expr) =
501 return $ HWFunction (mkVHDLId name) inports outport
503 name = getOccString var
504 ty = CoreUtils.exprType expr
505 (fargs, res) = Type.splitFunTys ty
506 args = if length fargs == 1 then fargs else (init fargs)
507 --state = if length fargs == 1 then () else (last fargs)
508 inports = case args of
509 -- Handle a single port specially, to prevent an extra 0 in the name
510 [port] -> [getPortNameMapForTy "portin" port]
511 ps -> getPortNameMapForTys "portin" 0 ps
512 outport = getPortNameMapForTy "portout" res
514 mkHWFunction (Rec _) =
515 error "Recursive binders not supported"
517 -- | How is a given (single) value in a function's type (ie, argument or
518 -- return value) used?
520 Port -- ^ Use it as a port (input or output)
521 | State --- ^ Use it as state (input or output)
524 useAsPort = mkHsValueMap (\x -> Single Port)
525 useAsState = mkHsValueMap (\x -> Single State)
527 -- | This type describes a particular use of a Haskell function and is used to
528 -- look up an appropriate hardware description.
529 data HsFunction = HsFunction {
530 hsName :: String, -- ^ What was the name of the original Haskell function?
531 hsArgs :: [HsValueMap HsValueUse], -- ^ How are the arguments used?
532 hsRes :: HsValueMap HsValueUse -- ^ How is the result value used?
533 } deriving (Show, Eq)
535 -- | Translate a function application to a HsFunction. i.e., which function
536 -- do you need to translate this function application.
538 Var.Var -- ^ The function to call
539 -> [CoreExpr] -- ^ The function arguments
540 -> Type -- ^ The return type
541 -> HsFunction -- ^ The needed HsFunction
543 appToHsFunction f args ty =
544 HsFunction hsname hsargs hsres
546 mkPort = \x -> Single Port
547 hsargs = map (mkHsValueMap mkPort . CoreUtils.exprType) args
548 hsres = mkHsValueMap mkPort ty
549 hsname = getOccString f
551 -- | Translate a top level function declaration to a HsFunction. i.e., which
552 -- interface will be provided by this function. This function essentially
553 -- defines the "calling convention" for hardware models.
555 Var.Var -- ^ The function defined
556 -> Type -- ^ The function type (including arguments!)
557 -> HsFunction -- ^ The resulting HsFunction
560 HsFunction hsname hsargs hsres
562 hsname = getOccString f
563 (arg_tys, res_ty) = Type.splitFunTys ty
564 -- The last argument must be state
565 state_ty = last arg_tys
566 state = useAsState state_ty
567 -- All but the last argument are inports
568 inports = map useAsPort (init arg_tys)
569 hsargs = inports ++ [state]
570 hsres = case splitTupleType res_ty of
571 -- Result type must be a two tuple (state, ports)
572 Just [outstate_ty, outport_ty] -> if Type.coreEqType state_ty outstate_ty
574 Tuple [state, useAsPort outport_ty]
576 error $ "Input state type of function " ++ hsname ++ ": " ++ (showSDoc $ ppr state_ty) ++ " does not match output state type: " ++ (showSDoc $ ppr outstate_ty)
577 otherwise -> error $ "Return type of top-level function " ++ hsname ++ " must be a two-tuple containing a state and output ports."
579 data VHDLSession = VHDLSession {
580 nameCount :: Int, -- A counter that can be used to generate unique names
581 funcs :: [(HsFunction, HWFunction)] -- All functions available
584 type VHDLState = State.State VHDLSession
586 -- Add the function to the session
587 addFunc :: HsFunction -> HWFunction -> VHDLState ()
588 addFunc hsfunc hwfunc = do
589 fs <- State.gets funcs -- Get the funcs element from the session
590 State.modify (\x -> x {funcs = (hsfunc, hwfunc) : fs }) -- Prepend name and f
592 -- Lookup the function with the given name in the current session. Errors if
594 getHWFunc :: HsFunction -> VHDLState HWFunction
595 getHWFunc hsfunc = do
596 fs <- State.gets funcs -- Get the funcs element from the session
597 return $ Maybe.fromMaybe
598 (error $ "Function " ++ (hsName hsfunc) ++ "is unknown? This should not happen!")
601 -- | Splits a tuple type into a list of element types, or Nothing if the type
602 -- is not a tuple type.
604 Type -- ^ The type to split
605 -> Maybe [Type] -- ^ The tuples element types
608 case Type.splitTyConApp_maybe ty of
609 Just (tycon, args) -> if TyCon.isTupleTyCon tycon
616 -- Makes the given name unique by appending a unique number.
617 -- This does not do any checking against existing names, so it only guarantees
618 -- uniqueness with other names generated by uniqueName.
619 uniqueName :: String -> VHDLState String
621 count <- State.gets nameCount -- Get the funcs element from the session
622 State.modify (\s -> s {nameCount = count + 1})
623 return $ name ++ "_" ++ (show count)
626 mkVHDLId :: String -> AST.VHDLId
627 mkVHDLId = AST.unsafeVHDLBasicId
631 (HsFunction "hwxor" [(Single Port), (Single Port)] (Single Port), HWFunction (mkVHDLId "hwxor") [Single (mkVHDLId "a", vhdl_bit_ty), Single (mkVHDLId "b", vhdl_bit_ty)] (Single (mkVHDLId "o", vhdl_bit_ty))),
632 (HsFunction "hwand" [(Single Port), (Single Port)] (Single Port), HWFunction (mkVHDLId "hwand") [Single (mkVHDLId "a", vhdl_bit_ty), Single (mkVHDLId "b", vhdl_bit_ty)] (Single (mkVHDLId "o", vhdl_bit_ty))),
633 (HsFunction "hwor" [(Single Port), (Single Port)] (Single Port), HWFunction (mkVHDLId "hwor") [Single (mkVHDLId "a", vhdl_bit_ty), Single (mkVHDLId "b", vhdl_bit_ty)] (Single (mkVHDLId "o", vhdl_bit_ty))),
634 (HsFunction "hwnot" [(Single Port)] (Single Port), HWFunction (mkVHDLId "hwnot") [Single (mkVHDLId "i", vhdl_bit_ty)] (Single (mkVHDLId "o", vhdl_bit_ty)))
637 vhdl_bit_ty :: AST.TypeMark
638 vhdl_bit_ty = AST.unsafeVHDLBasicId "Bit"
640 -- Translate a Haskell type to a VHDL type
641 vhdl_ty :: Type -> AST.TypeMark
642 vhdl_ty ty = Maybe.fromMaybe
643 (error $ "Unsupported Haskell type: " ++ (showSDoc $ ppr ty))
646 -- Translate a Haskell type to a VHDL type
647 vhdl_ty_maybe :: Type -> Maybe AST.TypeMark
649 case Type.splitTyConApp_maybe ty of
650 Just (tycon, args) ->
651 let name = TyCon.tyConName tycon in
652 -- TODO: Do something more robust than string matching
653 case getOccString name of
654 "Bit" -> Just vhdl_bit_ty
658 -- vim: set ts=8 sw=2 sts=2 expandtab: