4 import qualified Control.Monad as Monad
5 import qualified Data.Map as Map
7 import qualified Data.Either as Either
12 import qualified ForSyDe.Backend.VHDL.AST as AST
18 import qualified IdInfo
27 -----------------------------------------------------------------------------
28 -- Functions to generate VHDL for builtin functions
29 -----------------------------------------------------------------------------
31 -- | A function to wrap a builder-like function that expects its arguments to
34 (dst -> func -> [AST.Expr] -> res)
35 -> (dst -> func -> [Either CoreSyn.CoreExpr AST.Expr] -> res)
36 genExprArgs wrap dst func args = wrap dst func args'
37 where args' = map (either (varToVHDLExpr.exprToVar) id) args
39 -- | A function to wrap a builder-like function that expects its arguments to
42 (dst -> func -> [Var.Var] -> res)
43 -> (dst -> func -> [Either CoreSyn.CoreExpr AST.Expr] -> res)
44 genVarArgs wrap dst func args = wrap dst func args'
46 args' = map exprToVar exprargs
47 -- Check (rather crudely) that all arguments are CoreExprs
48 (exprargs, []) = Either.partitionEithers args
50 -- | A function to wrap a builder-like function that produces an expression
51 -- and expects it to be assigned to the destination.
53 ((Either CoreSyn.CoreBndr AST.VHDLName) -> func -> [arg] -> VHDLSession AST.Expr)
54 -> ((Either CoreSyn.CoreBndr AST.VHDLName) -> func -> [arg] -> VHDLSession [AST.ConcSm])
55 genExprRes wrap dst func args = do
56 expr <- wrap dst func args
57 return $ [mkUncondAssign dst expr]
59 -- | Generate a binary operator application. The first argument should be a
60 -- constructor from the AST.Expr type, e.g. AST.And.
61 genOperator2 :: (AST.Expr -> AST.Expr -> AST.Expr) -> BuiltinBuilder
62 genOperator2 op = genExprArgs $ genExprRes (genOperator2' op)
63 genOperator2' :: (AST.Expr -> AST.Expr -> AST.Expr) -> dst -> CoreSyn.CoreBndr -> [AST.Expr] -> VHDLSession AST.Expr
64 genOperator2' op _ f [arg1, arg2] = return $ op arg1 arg2
66 -- | Generate a unary operator application
67 genOperator1 :: (AST.Expr -> AST.Expr) -> BuiltinBuilder
68 genOperator1 op = genExprArgs $ genExprRes (genOperator1' op)
69 genOperator1' :: (AST.Expr -> AST.Expr) -> dst -> CoreSyn.CoreBndr -> [AST.Expr] -> VHDLSession AST.Expr
70 genOperator1' op _ f [arg] = return $ op arg
72 -- | Generate a function call from the destination binder, function name and a
73 -- list of expressions (its arguments)
74 genFCall :: BuiltinBuilder
75 genFCall = genExprArgs $ genExprRes genFCall'
76 genFCall' :: Either CoreSyn.CoreBndr AST.VHDLName -> CoreSyn.CoreBndr -> [AST.Expr] -> VHDLSession AST.Expr
77 genFCall' (Left res) f args = do
78 let fname = varToString f
79 let el_ty = (tfvec_elem . Var.varType) res
80 id <- vectorFunId el_ty fname
81 return $ AST.PrimFCall $ AST.FCall (AST.NSimple id) $
82 map (\exp -> Nothing AST.:=>: AST.ADExpr exp) args
83 genFCall' (Right name) _ _ = error $ "Cannot generate builtin function call assigned to a VHDLName: " ++ show name
85 -- | Generate a generate statement for the builtin function "map"
86 genMap :: BuiltinBuilder
87 genMap (Left res) f [Left mapped_f, Left (Var arg)] =
88 -- mapped_f must be a CoreExpr (since we can't represent functions as VHDL
89 -- expressions). arg must be a CoreExpr (and should be a CoreSyn.Var), since
90 -- we must index it (which we couldn't if it was a VHDL Expr, since only
91 -- VHDLNames can be indexed).
93 -- Setup the generate scheme
94 len = (tfvec_len . Var.varType) res
95 -- TODO: Use something better than varToString
96 label = mkVHDLExtId ("mapVector" ++ (varToString res))
97 n_id = mkVHDLBasicId "n"
98 n_expr = idToVHDLExpr n_id
99 range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
100 genScheme = AST.ForGn n_id range
102 -- Create the content of the generate statement: Applying the mapped_f to
103 -- each of the elements in arg, storing to each element in res
104 resname = mkIndexedName (varToVHDLName res) n_expr
105 argexpr = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName arg) n_expr
107 let (CoreSyn.Var real_f, already_mapped_args) = CoreSyn.collectArgs mapped_f
108 let valargs = get_val_args (Var.varType real_f) already_mapped_args
109 app_concsms <- genApplication (Right resname) real_f (map Left valargs ++ [Right argexpr])
110 -- Return the generate statement
111 return [AST.CSGSm $ AST.GenerateSm label genScheme [] app_concsms]
113 genMap' (Right name) _ _ = error $ "Cannot generate map function call assigned to a VHDLName: " ++ show name
115 genZipWith :: BuiltinBuilder
116 genZipWith = genVarArgs genZipWith'
117 genZipWith' :: (Either CoreSyn.CoreBndr AST.VHDLName) -> CoreSyn.CoreBndr -> [Var.Var] -> VHDLSession [AST.ConcSm]
118 genZipWith' (Left res) f args@[zipped_f, arg1, arg2] =
120 -- Setup the generate scheme
121 len = (tfvec_len . Var.varType) res
122 -- TODO: Use something better than varToString
123 label = mkVHDLExtId ("zipWithVector" ++ (varToString res))
124 n_id = mkVHDLBasicId "n"
125 n_expr = idToVHDLExpr n_id
126 range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
127 genScheme = AST.ForGn n_id range
129 -- Create the content of the generate statement: Applying the zipped_f to
130 -- each of the elements in arg1 and arg2, storing to each element in res
131 resname = mkIndexedName (varToVHDLName res) n_expr
132 argexpr1 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName arg1) n_expr
133 argexpr2 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName arg2) n_expr
135 app_concsms <- genApplication (Right resname) zipped_f [Right argexpr1, Right argexpr2]
136 -- Return the generate functions
137 return [AST.CSGSm $ AST.GenerateSm label genScheme [] app_concsms]
139 genFoldl :: BuiltinBuilder
140 genFoldl = genFold True
142 genFoldr :: BuiltinBuilder
143 genFoldr = genFold False
145 genFold :: Bool -> BuiltinBuilder
146 genFold left = genVarArgs (genFold' left)
147 genFold' :: Bool -> (Either CoreSyn.CoreBndr AST.VHDLName) -> CoreSyn.CoreBndr -> [Var.Var] -> VHDLSession [AST.ConcSm]
148 -- Special case for an empty input vector, just assign start to res
149 genFold' left (Left res) _ [_, start, vec] | len == 0 = return [mkUncondAssign (Left res) (varToVHDLExpr start)]
150 where len = (tfvec_len . Var.varType) vec
151 genFold' left (Left res) f [folded_f, start, vec] = do
152 -- evec is (TFVec n), so it still needs an element type
153 let (nvec, _) = splitAppTy (Var.varType vec)
154 -- Put the type of the start value in nvec, this will be the type of our
156 let tmp_ty = Type.mkAppTy nvec (Var.varType start)
157 tmp_vhdl_ty <- vhdl_ty tmp_ty
158 -- Setup the generate scheme
159 let gen_label = mkVHDLExtId ("foldlVector" ++ (varToString vec))
160 let block_label = mkVHDLExtId ("foldlVector" ++ (varToString start))
161 let gen_range = if left then AST.ToRange (AST.PrimLit "0") len_min_expr
162 else AST.DownRange len_min_expr (AST.PrimLit "0")
163 let gen_scheme = AST.ForGn n_id gen_range
164 -- Make the intermediate vector
165 let tmp_dec = AST.BDISD $ AST.SigDec tmp_id tmp_vhdl_ty Nothing
166 -- Create the generate statement
167 cells <- sequence [genFirstCell, genOtherCell]
168 let gen_sm = AST.GenerateSm gen_label gen_scheme [] (map AST.CSGSm cells)
169 -- Assign tmp[len-1] or tmp[0] to res
170 let out_assign = mkUncondAssign (Left res) $ vhdlNameToVHDLExpr (if left then
171 (mkIndexedName tmp_name (AST.PrimLit $ show (len-1))) else
172 (mkIndexedName tmp_name (AST.PrimLit "0")))
173 let block = AST.BlockSm block_label [] (AST.PMapAspect []) [tmp_dec] [AST.CSGSm gen_sm, out_assign]
174 return [AST.CSBSm block]
177 len = (tfvec_len . Var.varType) vec
178 -- An id for the counter
179 n_id = mkVHDLBasicId "n"
180 n_cur = idToVHDLExpr n_id
181 -- An expression for previous n
182 n_prev = if left then (n_cur AST.:-: (AST.PrimLit "1"))
183 else (n_cur AST.:+: (AST.PrimLit "1"))
184 -- An expression for len-1
185 len_min_expr = (AST.PrimLit $ show (len-1))
186 -- An id for the tmp result vector
187 tmp_id = mkVHDLBasicId "tmp"
188 tmp_name = AST.NSimple tmp_id
189 -- Generate parts of the fold
190 genFirstCell, genOtherCell :: VHDLSession AST.GenerateSm
192 let cond_label = mkVHDLExtId "firstcell"
193 -- if n == 0 or n == len-1
194 let cond_scheme = AST.IfGn $ n_cur AST.:=: (if left then (AST.PrimLit "0")
195 else (AST.PrimLit $ show (len-1)))
196 -- Output to tmp[current n]
197 let resname = mkIndexedName tmp_name n_cur
199 let argexpr1 = varToVHDLExpr start
200 -- Input from vec[current n]
201 let argexpr2 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName vec) n_cur
202 app_concsms <- genApplication (Right resname) folded_f ( if left then
203 [Right argexpr1, Right argexpr2]
205 [Right argexpr2, Right argexpr1]
207 -- Return the conditional generate part
208 return $ AST.GenerateSm cond_label cond_scheme [] app_concsms
211 let cond_label = mkVHDLExtId "othercell"
212 -- if n > 0 or n < len-1
213 let cond_scheme = AST.IfGn $ n_cur AST.:/=: (if left then (AST.PrimLit "0")
214 else (AST.PrimLit $ show (len-1)))
215 -- Output to tmp[current n]
216 let resname = mkIndexedName tmp_name n_cur
217 -- Input from tmp[previous n]
218 let argexpr1 = vhdlNameToVHDLExpr $ mkIndexedName tmp_name n_prev
219 -- Input from vec[current n]
220 let argexpr2 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName vec) n_cur
221 app_concsms <- genApplication (Right resname) folded_f ( if left then
222 [Right argexpr1, Right argexpr2]
224 [Right argexpr2, Right argexpr1]
226 -- Return the conditional generate part
227 return $ AST.GenerateSm cond_label cond_scheme [] app_concsms
229 -- | Generate a generate statement for the builtin function "zip"
230 genZip :: BuiltinBuilder
231 genZip = genVarArgs genZip'
232 genZip' :: (Either CoreSyn.CoreBndr AST.VHDLName) -> CoreSyn.CoreBndr -> [Var.Var] -> VHDLSession [AST.ConcSm]
233 genZip' (Left res) f args@[arg1, arg2] =
235 -- Setup the generate scheme
236 len = (tfvec_len . Var.varType) res
237 -- TODO: Use something better than varToString
238 label = mkVHDLExtId ("zipVector" ++ (varToString res))
239 n_id = mkVHDLBasicId "n"
240 n_expr = idToVHDLExpr n_id
241 range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
242 genScheme = AST.ForGn n_id range
243 resname' = mkIndexedName (varToVHDLName res) n_expr
244 argexpr1 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName arg1) n_expr
245 argexpr2 = vhdlNameToVHDLExpr $ mkIndexedName (varToVHDLName arg2) n_expr
247 labels <- getFieldLabels (tfvec_elem (Var.varType res))
248 let resnameA = mkSelectedName resname' (labels!!0)
249 let resnameB = mkSelectedName resname' (labels!!1)
250 let resA_assign = mkUncondAssign (Right resnameA) argexpr1
251 let resB_assign = mkUncondAssign (Right resnameB) argexpr2
252 -- Return the generate functions
253 return [AST.CSGSm $ AST.GenerateSm label genScheme [] [resA_assign,resB_assign]]
255 -- | Generate a generate statement for the builtin function "unzip"
256 genUnzip :: BuiltinBuilder
257 genUnzip = genVarArgs genUnzip'
258 genUnzip' :: (Either CoreSyn.CoreBndr AST.VHDLName) -> CoreSyn.CoreBndr -> [Var.Var] -> VHDLSession [AST.ConcSm]
259 genUnzip' (Left res) f args@[arg] =
261 -- Setup the generate scheme
262 len = (tfvec_len . Var.varType) arg
263 -- TODO: Use something better than varToString
264 label = mkVHDLExtId ("unzipVector" ++ (varToString res))
265 n_id = mkVHDLBasicId "n"
266 n_expr = idToVHDLExpr n_id
267 range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
268 genScheme = AST.ForGn n_id range
269 resname' = varToVHDLName res
270 argexpr' = mkIndexedName (varToVHDLName arg) n_expr
272 reslabels <- getFieldLabels (Var.varType res)
273 arglabels <- getFieldLabels (tfvec_elem (Var.varType arg))
274 let resnameA = mkIndexedName (mkSelectedName resname' (reslabels!!0)) n_expr
275 let resnameB = mkIndexedName (mkSelectedName resname' (reslabels!!1)) n_expr
276 let argexprA = vhdlNameToVHDLExpr $ mkSelectedName argexpr' (arglabels!!0)
277 let argexprB = vhdlNameToVHDLExpr $ mkSelectedName argexpr' (arglabels!!1)
278 let resA_assign = mkUncondAssign (Right resnameA) argexprA
279 let resB_assign = mkUncondAssign (Right resnameB) argexprB
280 -- Return the generate functions
281 return [AST.CSGSm $ AST.GenerateSm label genScheme [] [resA_assign,resB_assign]]
283 genCopy :: BuiltinBuilder
284 genCopy = genVarArgs genCopy'
285 genCopy' :: (Either CoreSyn.CoreBndr AST.VHDLName ) -> CoreSyn.CoreBndr -> [Var.Var] -> VHDLSession [AST.ConcSm]
286 genCopy' (Left res) f args@[arg] =
288 resExpr = AST.Aggregate [AST.ElemAssoc (Just AST.Others)
289 (AST.PrimName $ (varToVHDLName arg))]
290 out_assign = mkUncondAssign (Left res) resExpr
296 -----------------------------------------------------------------------------
297 -- Function to generate VHDL for applications
298 -----------------------------------------------------------------------------
300 (Either CoreSyn.CoreBndr AST.VHDLName) -- ^ Where to store the result?
301 -> CoreSyn.CoreBndr -- ^ The function to apply
302 -> [Either CoreSyn.CoreExpr AST.Expr] -- ^ The arguments to apply
303 -> VHDLSession [AST.ConcSm] -- ^ The resulting concurrent statements
304 genApplication dst f args =
305 case Var.globalIdVarDetails f of
306 IdInfo.DataConWorkId dc -> case dst of
307 -- It's a datacon. Create a record from its arguments.
309 -- We have the bndr, so we can get at the type
310 labels <- getFieldLabels (Var.varType bndr)
311 return $ zipWith mkassign labels $ map (either exprToVHDLExpr id) args
313 mkassign :: AST.VHDLId -> AST.Expr -> AST.ConcSm
315 let sel_name = mkSelectedName ((either varToVHDLName id) dst) label in
316 mkUncondAssign (Right sel_name) arg
317 Right _ -> error $ "Generate.genApplication Can't generate dataconstructor application without an original binder"
318 IdInfo.VanillaGlobal -> do
319 -- It's a global value imported from elsewhere. These can be builtin
320 -- functions. Look up the function name in the name table and execute
321 -- the associated builder if there is any and the argument count matches
322 -- (this should always be the case if it typechecks, but just to be
324 case (Map.lookup (varToString f) globalNameTable) of
325 Just (arg_count, builder) ->
326 if length args == arg_count then
329 error $ "Generate.genApplication Incorrect number of arguments to builtin function: " ++ pprString f ++ " Args: " ++ show args
330 Nothing -> error $ "Using function from another module that is not a known builtin: " ++ pprString f
331 IdInfo.NotGlobalId -> do
332 signatures <- getA vsSignatures
333 -- This is a local id, so it should be a function whose definition we
334 -- have and which can be turned into a component instantiation.
336 signature = Maybe.fromMaybe
337 (error $ "Using function '" ++ (varToString f) ++ "' without signature? This should not happen!")
338 (Map.lookup f signatures)
339 entity_id = ent_id signature
340 -- TODO: Using show here isn't really pretty, but we'll need some
341 -- unique-ish value...
342 label = "comp_ins_" ++ (either show prettyShow) dst
343 portmaps = mkAssocElems (map (either exprToVHDLExpr id) args) ((either varToVHDLName id) dst) signature
345 return [mkComponentInst label entity_id portmaps]
346 details -> error $ "Calling unsupported function " ++ pprString f ++ " with GlobalIdDetails " ++ pprString details
348 -----------------------------------------------------------------------------
349 -- Functions to generate functions dealing with vectors.
350 -----------------------------------------------------------------------------
352 -- Returns the VHDLId of the vector function with the given name for the given
353 -- element type. Generates -- this function if needed.
354 vectorFunId :: Type.Type -> String -> VHDLSession AST.VHDLId
355 vectorFunId el_ty fname = do
356 elemTM <- vhdl_ty el_ty
357 -- TODO: This should not be duplicated from mk_vector_ty. Probably but it in
358 -- the VHDLState or something.
359 let vectorTM = mkVHDLExtId $ "vector_" ++ (AST.fromVHDLId elemTM)
360 typefuns <- getA vsTypeFuns
361 case Map.lookup (OrdType el_ty, fname) typefuns of
362 -- Function already generated, just return it
363 Just (id, _) -> return id
364 -- Function not generated yet, generate it
366 let functions = genUnconsVectorFuns elemTM vectorTM
367 case lookup fname functions of
369 modA vsTypeFuns $ Map.insert (OrdType el_ty, fname) (function_id, body)
371 Nothing -> error $ "I don't know how to generate vector function " ++ fname
373 function_id = mkVHDLExtId fname
375 genUnconsVectorFuns :: AST.TypeMark -- ^ type of the vector elements
376 -> AST.TypeMark -- ^ type of the vector
377 -> [(String, AST.SubProgBody)]
378 genUnconsVectorFuns elemTM vectorTM =
379 [ (exId, AST.SubProgBody exSpec [] [exExpr])
380 , (replaceId, AST.SubProgBody replaceSpec [AST.SPVD replaceVar] [replaceExpr,replaceRet])
381 , (headId, AST.SubProgBody headSpec [] [headExpr])
382 , (lastId, AST.SubProgBody lastSpec [] [lastExpr])
383 , (initId, AST.SubProgBody initSpec [AST.SPVD initVar] [initExpr, initRet])
384 , (tailId, AST.SubProgBody tailSpec [AST.SPVD tailVar] [tailExpr, tailRet])
385 , (takeId, AST.SubProgBody takeSpec [AST.SPVD takeVar] [takeExpr, takeRet])
386 , (dropId, AST.SubProgBody dropSpec [AST.SPVD dropVar] [dropExpr, dropRet])
387 , (plusgtId, AST.SubProgBody plusgtSpec [AST.SPVD plusgtVar] [plusgtExpr, plusgtRet])
388 , (emptyId, AST.SubProgBody emptySpec [AST.SPCD emptyVar] [emptyExpr])
389 , (singletonId, AST.SubProgBody singletonSpec [AST.SPVD singletonVar] [singletonRet])
390 , (copynId, AST.SubProgBody copynSpec [AST.SPVD copynVar] [copynExpr])
391 , (selId, AST.SubProgBody selSpec [AST.SPVD selVar] [selFor, selRet])
392 , (ltplusId, AST.SubProgBody ltplusSpec [AST.SPVD ltplusVar] [ltplusExpr, ltplusRet] )
393 , (plusplusId, AST.SubProgBody plusplusSpec [AST.SPVD plusplusVar] [plusplusExpr, plusplusRet])
394 , (lengthTId, AST.SubProgBody lengthTSpec [] [lengthTExpr])
397 ixPar = AST.unsafeVHDLBasicId "ix"
398 vecPar = AST.unsafeVHDLBasicId "vec"
399 vec1Par = AST.unsafeVHDLBasicId "vec1"
400 vec2Par = AST.unsafeVHDLBasicId "vec2"
401 nPar = AST.unsafeVHDLBasicId "n"
402 iId = AST.unsafeVHDLBasicId "i"
404 aPar = AST.unsafeVHDLBasicId "a"
405 fPar = AST.unsafeVHDLBasicId "f"
406 sPar = AST.unsafeVHDLBasicId "s"
407 resId = AST.unsafeVHDLBasicId "res"
408 exSpec = AST.Function (mkVHDLExtId exId) [AST.IfaceVarDec vecPar vectorTM,
409 AST.IfaceVarDec ixPar naturalTM] elemTM
410 exExpr = AST.ReturnSm (Just $ AST.PrimName $ AST.NIndexed
411 (AST.IndexedName (AST.NSimple vecPar) [AST.PrimName $
413 replaceSpec = AST.Function (mkVHDLExtId replaceId) [ AST.IfaceVarDec vecPar vectorTM
414 , AST.IfaceVarDec iPar naturalTM
415 , AST.IfaceVarDec aPar elemTM
417 -- variable res : fsvec_x (0 to vec'length-1);
420 (AST.SubtypeIn vectorTM
421 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
422 [AST.ToRange (AST.PrimLit "0")
423 (AST.PrimName (AST.NAttribute $
424 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
425 (AST.PrimLit "1")) ]))
427 -- res AST.:= vec(0 to i-1) & a & vec(i+1 to length'vec-1)
428 replaceExpr = AST.NSimple resId AST.:=
429 (vecSlice (AST.PrimLit "0") (AST.PrimName (AST.NSimple iPar) AST.:-: AST.PrimLit "1") AST.:&:
430 AST.PrimName (AST.NSimple aPar) AST.:&:
431 vecSlice (AST.PrimName (AST.NSimple iPar) AST.:+: AST.PrimLit "1")
432 ((AST.PrimName (AST.NAttribute $
433 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing))
434 AST.:-: AST.PrimLit "1"))
435 replaceRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
436 vecSlice init last = AST.PrimName (AST.NSlice
439 (AST.ToRange init last)))
440 headSpec = AST.Function (mkVHDLExtId headId) [AST.IfaceVarDec vecPar vectorTM] elemTM
442 headExpr = AST.ReturnSm (Just $ (AST.PrimName $ AST.NIndexed (AST.IndexedName
443 (AST.NSimple vecPar) [AST.PrimLit "0"])))
444 lastSpec = AST.Function (mkVHDLExtId lastId) [AST.IfaceVarDec vecPar vectorTM] elemTM
445 -- return vec(vec'length-1);
446 lastExpr = AST.ReturnSm (Just $ (AST.PrimName $ AST.NIndexed (AST.IndexedName
448 [AST.PrimName (AST.NAttribute $
449 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing)
450 AST.:-: AST.PrimLit "1"])))
451 initSpec = AST.Function (mkVHDLExtId initId) [AST.IfaceVarDec vecPar vectorTM] vectorTM
452 -- variable res : fsvec_x (0 to vec'length-2);
455 (AST.SubtypeIn vectorTM
456 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
457 [AST.ToRange (AST.PrimLit "0")
458 (AST.PrimName (AST.NAttribute $
459 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
460 (AST.PrimLit "2")) ]))
462 -- resAST.:= vec(0 to vec'length-2)
463 initExpr = AST.NSimple resId AST.:= (vecSlice
465 (AST.PrimName (AST.NAttribute $
466 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing)
467 AST.:-: AST.PrimLit "2"))
468 initRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
469 tailSpec = AST.Function (mkVHDLExtId tailId) [AST.IfaceVarDec vecPar vectorTM] vectorTM
470 -- variable res : fsvec_x (0 to vec'length-2);
473 (AST.SubtypeIn vectorTM
474 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
475 [AST.ToRange (AST.PrimLit "0")
476 (AST.PrimName (AST.NAttribute $
477 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
478 (AST.PrimLit "2")) ]))
480 -- res AST.:= vec(1 to vec'length-1)
481 tailExpr = AST.NSimple resId AST.:= (vecSlice
483 (AST.PrimName (AST.NAttribute $
484 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing)
485 AST.:-: AST.PrimLit "1"))
486 tailRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
487 takeSpec = AST.Function (mkVHDLExtId takeId) [AST.IfaceVarDec nPar naturalTM,
488 AST.IfaceVarDec vecPar vectorTM ] vectorTM
489 -- variable res : fsvec_x (0 to n-1);
492 (AST.SubtypeIn vectorTM
493 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
494 [AST.ToRange (AST.PrimLit "0")
495 ((AST.PrimName (AST.NSimple nPar)) AST.:-:
496 (AST.PrimLit "1")) ]))
498 -- res AST.:= vec(0 to n-1)
499 takeExpr = AST.NSimple resId AST.:=
500 (vecSlice (AST.PrimLit "1")
501 (AST.PrimName (AST.NSimple $ nPar) AST.:-: AST.PrimLit "1"))
502 takeRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
503 dropSpec = AST.Function (mkVHDLExtId dropId) [AST.IfaceVarDec nPar naturalTM,
504 AST.IfaceVarDec vecPar vectorTM ] vectorTM
505 -- variable res : fsvec_x (0 to vec'length-n-1);
508 (AST.SubtypeIn vectorTM
509 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
510 [AST.ToRange (AST.PrimLit "0")
511 (AST.PrimName (AST.NAttribute $
512 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
513 (AST.PrimName $ AST.NSimple nPar)AST.:-: (AST.PrimLit "1")) ]))
515 -- res AST.:= vec(n to vec'length-1)
516 dropExpr = AST.NSimple resId AST.:= (vecSlice
517 (AST.PrimName $ AST.NSimple nPar)
518 (AST.PrimName (AST.NAttribute $
519 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing)
520 AST.:-: AST.PrimLit "1"))
521 dropRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
522 plusgtSpec = AST.Function (mkVHDLExtId plusgtId) [AST.IfaceVarDec aPar elemTM,
523 AST.IfaceVarDec vecPar vectorTM] vectorTM
524 -- variable res : fsvec_x (0 to vec'length);
527 (AST.SubtypeIn vectorTM
528 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
529 [AST.ToRange (AST.PrimLit "0")
530 (AST.PrimName (AST.NAttribute $
531 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing))]))
533 plusgtExpr = AST.NSimple resId AST.:=
534 ((AST.PrimName $ AST.NSimple aPar) AST.:&:
535 (AST.PrimName $ AST.NSimple vecPar))
536 plusgtRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
537 emptySpec = AST.Function (mkVHDLExtId emptyId) [] vectorTM
540 (AST.SubtypeIn vectorTM Nothing)
541 (Just $ AST.PrimLit "\"\"")
542 emptyExpr = AST.ReturnSm (Just $ AST.PrimName (AST.NSimple resId))
543 singletonSpec = AST.Function (mkVHDLExtId singletonId) [AST.IfaceVarDec aPar elemTM ]
545 -- variable res : fsvec_x (0 to 0) := (others => a);
548 (AST.SubtypeIn vectorTM
549 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
550 [AST.ToRange (AST.PrimLit "0") (AST.PrimLit "0")]))
551 (Just $ AST.Aggregate [AST.ElemAssoc (Just AST.Others)
552 (AST.PrimName $ AST.NSimple aPar)])
553 singletonRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
554 copynSpec = AST.Function (mkVHDLExtId copynId) [AST.IfaceVarDec nPar naturalTM,
555 AST.IfaceVarDec aPar elemTM ] vectorTM
556 -- variable res : fsvec_x (0 to n-1) := (others => a);
559 (AST.SubtypeIn vectorTM
560 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
561 [AST.ToRange (AST.PrimLit "0")
562 ((AST.PrimName (AST.NSimple nPar)) AST.:-:
563 (AST.PrimLit "1")) ]))
564 (Just $ AST.Aggregate [AST.ElemAssoc (Just AST.Others)
565 (AST.PrimName $ AST.NSimple aPar)])
567 copynExpr = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
568 selSpec = AST.Function (mkVHDLExtId selId) [AST.IfaceVarDec fPar naturalTM,
569 AST.IfaceVarDec sPar naturalTM,
570 AST.IfaceVarDec nPar naturalTM,
571 AST.IfaceVarDec vecPar vectorTM ] vectorTM
572 -- variable res : fsvec_x (0 to n-1);
575 (AST.SubtypeIn vectorTM
576 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
577 [AST.ToRange (AST.PrimLit "0")
578 ((AST.PrimName (AST.NSimple nPar)) AST.:-:
579 (AST.PrimLit "1")) ])
582 -- for i res'range loop
583 -- res(i) := vec(f+i*s);
585 selFor = AST.ForSM iId (AST.AttribRange $ AST.AttribName (AST.NSimple resId) rangeId Nothing) [selAssign]
586 -- res(i) := vec(f+i*s);
587 selAssign = let origExp = AST.PrimName (AST.NSimple fPar) AST.:+:
588 (AST.PrimName (AST.NSimple iId) AST.:*:
589 AST.PrimName (AST.NSimple sPar)) in
590 AST.NIndexed (AST.IndexedName (AST.NSimple resId) [AST.PrimName (AST.NSimple iId)]) AST.:=
591 (AST.PrimName $ AST.NIndexed (AST.IndexedName (AST.NSimple vecPar) [origExp]))
593 selRet = AST.ReturnSm (Just $ AST.PrimName (AST.NSimple resId))
594 ltplusSpec = AST.Function (mkVHDLExtId ltplusId) [AST.IfaceVarDec vecPar vectorTM,
595 AST.IfaceVarDec aPar elemTM] vectorTM
596 -- variable res : fsvec_x (0 to vec'length);
599 (AST.SubtypeIn vectorTM
600 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
601 [AST.ToRange (AST.PrimLit "0")
602 (AST.PrimName (AST.NAttribute $
603 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing))]))
605 ltplusExpr = AST.NSimple resId AST.:=
606 ((AST.PrimName $ AST.NSimple vecPar) AST.:&:
607 (AST.PrimName $ AST.NSimple aPar))
608 ltplusRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
609 plusplusSpec = AST.Function (mkVHDLExtId plusplusId) [AST.IfaceVarDec vec1Par vectorTM,
610 AST.IfaceVarDec vec2Par vectorTM]
612 -- variable res : fsvec_x (0 to vec1'length + vec2'length -1);
615 (AST.SubtypeIn vectorTM
616 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
617 [AST.ToRange (AST.PrimLit "0")
618 (AST.PrimName (AST.NAttribute $
619 AST.AttribName (AST.NSimple vec1Par) (mkVHDLBasicId lengthId) Nothing) AST.:+:
620 AST.PrimName (AST.NAttribute $
621 AST.AttribName (AST.NSimple vec2Par) (mkVHDLBasicId lengthId) Nothing) AST.:-:
624 plusplusExpr = AST.NSimple resId AST.:=
625 ((AST.PrimName $ AST.NSimple vec1Par) AST.:&:
626 (AST.PrimName $ AST.NSimple vec2Par))
627 plusplusRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
628 lengthTSpec = AST.Function (mkVHDLExtId lengthTId) [AST.IfaceVarDec vecPar vectorTM] naturalTM
629 lengthTExpr = AST.ReturnSm (Just $ AST.PrimName (AST.NAttribute $
630 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing))
632 -----------------------------------------------------------------------------
633 -- A table of builtin functions
634 -----------------------------------------------------------------------------
636 -- | The builtin functions we support. Maps a name to an argument count and a
638 globalNameTable :: NameTable
639 globalNameTable = Map.fromList
640 [ (exId , (2, genFCall ) )
641 , (replaceId , (3, genFCall ) )
642 , (headId , (1, genFCall ) )
643 , (lastId , (1, genFCall ) )
644 , (tailId , (1, genFCall ) )
645 , (initId , (1, genFCall ) )
646 , (takeId , (2, genFCall ) )
647 , (dropId , (2, genFCall ) )
648 , (selId , (4, genFCall ) )
649 , (plusgtId , (2, genFCall ) )
650 , (ltplusId , (2, genFCall ) )
651 , (plusplusId , (2, genFCall ) )
652 , (mapId , (2, genMap ) )
653 , (zipWithId , (3, genZipWith ) )
654 , (foldlId , (3, genFoldl ) )
655 , (foldrId , (3, genFoldr ) )
656 , (zipId , (2, genZip ) )
657 , (unzipId , (1, genUnzip ) )
658 , (emptyId , (0, genFCall ) )
659 , (singletonId , (1, genFCall ) )
660 , (copynId , (2, genFCall ) )
661 , (copyId , (1, genCopy ) )
662 , (lengthTId , (1, genFCall ) )
663 , (hwxorId , (2, genOperator2 AST.Xor ) )
664 , (hwandId , (2, genOperator2 AST.And ) )
665 , (hworId , (2, genOperator2 AST.Or ) )
666 , (hwnotId , (1, genOperator1 AST.Not ) )