4 import qualified Control.Monad as Monad
5 import qualified Data.Map as Map
7 import qualified Data.Either as Either
12 import qualified ForSyDe.Backend.VHDL.AST as AST
18 import qualified IdInfo
27 -----------------------------------------------------------------------------
28 -- Functions to generate VHDL for builtin functions
29 -----------------------------------------------------------------------------
31 -- | A function to wrap a builder-like function that expects its arguments to
34 (dst -> func -> [AST.Expr] -> res)
35 -> (dst -> func -> [Either CoreSyn.CoreExpr AST.Expr] -> res)
36 genExprArgs wrap dst func args = wrap dst func args'
37 where args' = map (either (varToVHDLExpr.exprToVar) id) args
39 -- | A function to wrap a builder-like function that expects its arguments to
42 (dst -> func -> [Var.Var] -> res)
43 -> (dst -> func -> [Either CoreSyn.CoreExpr AST.Expr] -> res)
44 genVarArgs wrap dst func args = wrap dst func args'
46 args' = map exprToVar exprargs
47 -- Check (rather crudely) that all arguments are CoreExprs
48 (exprargs, []) = Either.partitionEithers args
50 -- | A function to wrap a builder-like function that produces an expression
51 -- and expects it to be assigned to the destination.
53 ((Either CoreSyn.CoreBndr AST.VHDLName) -> func -> [arg] -> VHDLSession AST.Expr)
54 -> ((Either CoreSyn.CoreBndr AST.VHDLName) -> func -> [arg] -> VHDLSession [AST.ConcSm])
55 genExprRes wrap dst func args = do
56 expr <- wrap dst func args
57 return $ [mkUncondAssign dst expr]
59 -- | Generate a binary operator application. The first argument should be a
60 -- constructor from the AST.Expr type, e.g. AST.And.
61 genOperator2 :: (AST.Expr -> AST.Expr -> AST.Expr) -> BuiltinBuilder
62 genOperator2 op = genExprArgs $ genExprRes (genOperator2' op)
63 genOperator2' :: (AST.Expr -> AST.Expr -> AST.Expr) -> dst -> CoreSyn.CoreBndr -> [AST.Expr] -> VHDLSession AST.Expr
64 genOperator2' op _ f [arg1, arg2] = return $ op arg1 arg2
66 -- | Generate a unary operator application
67 genOperator1 :: (AST.Expr -> AST.Expr) -> BuiltinBuilder
68 genOperator1 op = genExprArgs $ genExprRes (genOperator1' op)
69 genOperator1' :: (AST.Expr -> AST.Expr) -> dst -> CoreSyn.CoreBndr -> [AST.Expr] -> VHDLSession AST.Expr
70 genOperator1' op _ f [arg] = return $ op arg
72 -- | Generate a function call from the destination binder, function name and a
73 -- list of expressions (its arguments)
74 genFCall :: BuiltinBuilder
75 genFCall = genExprArgs $ genExprRes genFCall'
76 genFCall' :: Either CoreSyn.CoreBndr AST.VHDLName -> CoreSyn.CoreBndr -> [AST.Expr] -> VHDLSession AST.Expr
77 genFCall' (Left res) f args = do
78 let fname = varToString f
79 let el_ty = (tfvec_elem . Var.varType) res
80 id <- vectorFunId el_ty fname
81 return $ AST.PrimFCall $ AST.FCall (AST.NSimple id) $
82 map (\exp -> Nothing AST.:=>: AST.ADExpr exp) args
83 genFCall' (Right name) _ _ = error $ "Cannot generate builtin function call assigned to a VHDLName: " ++ show name
85 -- | Generate a generate statement for the builtin function "map"
86 genMap :: BuiltinBuilder
87 genMap = genVarArgs genMap'
88 genMap' (Left res) f [mapped_f, arg] = do
89 signatures <- getA vsSignatures
90 let entity = Maybe.fromMaybe
91 (error $ "Using function '" ++ (varToString mapped_f) ++ "' without signature? This should not happen!")
92 (Map.lookup mapped_f signatures)
94 -- Setup the generate scheme
95 len = (tfvec_len . Var.varType) res
96 -- TODO: Use something better than varToString
97 label = mkVHDLExtId ("mapVector" ++ (varToString res))
98 nPar = AST.unsafeVHDLBasicId "n"
99 range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
100 genScheme = AST.ForGn nPar range
101 -- Get the entity name and port names
102 entity_id = ent_id entity
103 argports = map (Monad.liftM fst) (ent_args entity)
104 resport = (Monad.liftM fst) (ent_res entity)
106 inport = mkAssocElemIndexed (argports!!0) (varToVHDLId arg) nPar
107 outport = mkAssocElemIndexed resport (varToVHDLId res) nPar
108 portassigns = Maybe.catMaybes [inport,outport]
109 -- Generate the portmap
110 mapLabel = "map" ++ (AST.fromVHDLId entity_id)
111 compins = mkComponentInst mapLabel entity_id portassigns
112 -- Return the generate functions
113 genSm = AST.CSGSm $ AST.GenerateSm label genScheme [] [compins]
116 genMap' (Right name) _ _ = error $ "Cannot generate map function call assigned to a VHDLName: " ++ show name
118 genZipWith :: BuiltinBuilder
119 genZipWith = genVarArgs genZipWith'
120 genZipWith' :: (Either CoreSyn.CoreBndr AST.VHDLName) -> CoreSyn.CoreBndr -> [Var.Var] -> VHDLSession [AST.ConcSm]
121 genZipWith' (Left res) f args@[zipped_f, arg1, arg2] = do
122 signatures <- getA vsSignatures
123 let entity = Maybe.fromMaybe
124 (error $ "Using function '" ++ (varToString zipped_f) ++ "' without signature? This should not happen!")
125 (Map.lookup zipped_f signatures)
127 -- Setup the generate scheme
128 len = (tfvec_len . Var.varType) res
129 -- TODO: Use something better than varToString
130 label = mkVHDLExtId ("zipWithVector" ++ (varToString res))
131 nPar = AST.unsafeVHDLBasicId "n"
132 range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
133 genScheme = AST.ForGn nPar range
134 -- Get the entity name and port names
135 entity_id = ent_id entity
136 argports = map (Monad.liftM fst) (ent_args entity)
137 resport = (Monad.liftM fst) (ent_res entity)
139 inport1 = mkAssocElemIndexed (argports!!0) (varToVHDLId arg1) nPar
140 inport2 = mkAssocElemIndexed (argports!!1) (varToVHDLId arg2) nPar
141 outport = mkAssocElemIndexed resport (varToVHDLId res) nPar
142 portassigns = Maybe.catMaybes [inport1,inport2,outport]
143 -- Generate the portmap
144 mapLabel = "zipWith" ++ (AST.fromVHDLId entity_id)
145 compins = mkComponentInst mapLabel entity_id portassigns
146 -- Return the generate functions
147 genSm = AST.CSGSm $ AST.GenerateSm label genScheme [] [compins]
151 genFoldl :: BuiltinBuilder
152 genFoldl = genVarArgs genFoldl'
153 genFoldl' resVal f [folded_f, startVal, inVec] = do
154 signatures <- getA vsSignatures
155 let entity = Maybe.fromMaybe
156 (error $ "Using function '" ++ (varToString folded_f) ++ "' without signature? This should not happen!")
157 (Map.lookup folded_f signatures)
158 let (vec, _) = splitAppTy (Var.varType inVec)
159 let vecty = Type.mkAppTy vec (Var.varType startVal)
160 vecType <- vhdl_ty vecty
161 -- Setup the generate scheme
162 let len = (tfvec_len . Var.varType) inVec
163 let genlabel = mkVHDLExtId ("foldlVector" ++ (varToString inVec))
164 let blockLabel = mkVHDLExtId ("foldlVector" ++ (varToString startVal))
165 let range = AST.ToRange (AST.PrimLit "0") (AST.PrimLit $ show (len-1))
166 let genScheme = AST.ForGn (AST.unsafeVHDLBasicId "n") range
167 -- Make the intermediate vector
168 let tmpVec = AST.BDISD $ AST.SigDec (mkVHDLExtId "tmp") vecType Nothing
169 -- Get the entity name and port names
170 let entity_id = ent_id entity
171 let argports = map (Monad.liftM fst) (ent_args entity)
172 let resport = (Monad.liftM fst) (ent_res entity)
173 -- Return the generate functions
174 let genSm = AST.GenerateSm genlabel genScheme []
175 [ AST.CSGSm (genFirstCell (entity_id, argports, resport)
176 [startVal, inVec, resVal])
177 , AST.CSGSm (genOtherCell (entity_id, argports, resport)
178 [startVal, inVec, resVal])
179 , AST.CSGSm (genLastCell (entity_id, argports, resport)
180 [startVal, inVec, resVal])
182 return $ [AST.CSBSm $ AST.BlockSm blockLabel [] (AST.PMapAspect []) [tmpVec] [AST.CSGSm genSm]]
184 genFirstCell (entity_id, argports, resport) [startVal, inVec, resVal] = cellGn
186 cellLabel = mkVHDLExtId "firstcell"
187 cellGenScheme = AST.IfGn ((AST.PrimName $ AST.NSimple nPar) AST.:=: (AST.PrimLit "0"))
188 tmpId = mkVHDLExtId "tmp"
189 nPar = AST.unsafeVHDLBasicId "n"
191 inport1 = mkAssocElem (argports!!0) (varToString startVal)
192 inport2 = mkAssocElemIndexed (argports!!1) (varToVHDLId inVec) nPar
193 outport = mkAssocElemIndexed resport tmpId nPar
194 portassigns = Maybe.catMaybes [inport1,inport2,outport]
195 -- Generate the portmap
196 mapLabel = "cell" ++ (AST.fromVHDLId entity_id)
197 compins = mkComponentInst mapLabel entity_id portassigns
198 -- Return the generate functions
199 cellGn = AST.GenerateSm cellLabel cellGenScheme [] [compins]
200 genOtherCell (entity_id, argports, resport) [startVal, inVec, resVal] = cellGn
202 len = (tfvec_len . Var.varType) inVec
203 cellLabel = mkVHDLExtId "othercell"
204 cellGenScheme = AST.IfGn $ AST.And ((AST.PrimName $ AST.NSimple nPar) AST.:>: (AST.PrimLit "0"))
205 ((AST.PrimName $ AST.NSimple nPar) AST.:<: (AST.PrimLit $ show (len-1)))
206 tmpId = mkVHDLExtId "tmp"
207 nPar = AST.unsafeVHDLBasicId "n"
209 inport1 = mkAssocElemIndexed (argports!!0) tmpId (AST.unsafeVHDLBasicId "n-1")
210 inport2 = mkAssocElemIndexed (argports!!1) (varToVHDLId inVec) nPar
211 outport = mkAssocElemIndexed resport tmpId nPar
212 portassigns = Maybe.catMaybes [inport1,inport2,outport]
213 -- Generate the portmap
214 mapLabel = "cell" ++ (AST.fromVHDLId entity_id)
215 compins = mkComponentInst mapLabel entity_id portassigns
216 -- Return the generate functions
217 cellGn = AST.GenerateSm cellLabel cellGenScheme [] [compins]
218 genLastCell (entity_id, argports, resport) [startVal, inVec, resVal] = cellGn
220 len = (tfvec_len . Var.varType) inVec
221 cellLabel = mkVHDLExtId "lastCell"
222 cellGenScheme = AST.IfGn ((AST.PrimName $ AST.NSimple nPar) AST.:=: (AST.PrimLit $ show (len-1)))
223 tmpId = mkVHDLExtId "tmp"
224 nPar = AST.unsafeVHDLBasicId "n"
226 inport1 = mkAssocElemIndexed (argports!!0) tmpId (AST.unsafeVHDLBasicId "n-1")
227 inport2 = mkAssocElemIndexed (argports!!1) (varToVHDLId inVec) nPar
228 outport = mkAssocElemIndexed resport tmpId nPar
229 portassigns = Maybe.catMaybes [inport1,inport2,outport]
230 -- Generate the portmap
231 mapLabel = "cell" ++ (AST.fromVHDLId entity_id)
232 compins = mkComponentInst mapLabel entity_id portassigns
233 -- Generate the output assignment
234 assign = mkUncondAssign (Left resVal) (AST.PrimName (AST.NIndexed (AST.IndexedName
235 (AST.NSimple tmpId) [AST.PrimLit $ show (len-1)])))
236 -- Return the generate functions
237 cellGn = AST.GenerateSm cellLabel cellGenScheme [] [compins,assign]
239 -----------------------------------------------------------------------------
240 -- Function to generate VHDL for applications
241 -----------------------------------------------------------------------------
243 (Either CoreSyn.CoreBndr AST.VHDLName) -- ^ Where to store the result?
244 -> CoreSyn.CoreBndr -- ^ The function to apply
245 -> [Either CoreSyn.CoreExpr AST.Expr] -- ^ The arguments to apply
246 -> VHDLSession [AST.ConcSm] -- ^ The resulting concurrent statements
247 genApplication dst f args =
248 case Var.globalIdVarDetails f of
249 IdInfo.DataConWorkId dc -> case dst of
250 -- It's a datacon. Create a record from its arguments.
252 -- We have the bndr, so we can get at the type
253 labels <- getFieldLabels (Var.varType bndr)
254 return $ zipWith mkassign labels $ map (either exprToVHDLExpr id) args
256 mkassign :: AST.VHDLId -> AST.Expr -> AST.ConcSm
258 let sel_name = mkSelectedName ((either varToVHDLName id) dst) label in
259 mkUncondAssign (Right sel_name) arg
260 Right _ -> error $ "Generate.genApplication Can't generate dataconstructor application without an original binder"
261 IdInfo.VanillaGlobal -> do
262 -- It's a global value imported from elsewhere. These can be builtin
263 -- functions. Look up the function name in the name table and execute
264 -- the associated builder if there is any and the argument count matches
265 -- (this should always be the case if it typechecks, but just to be
267 case (Map.lookup (varToString f) globalNameTable) of
268 Just (arg_count, builder) ->
269 if length args == arg_count then
272 error $ "Generate.genApplication Incorrect number of arguments to builtin function: " ++ pprString f ++ " Args: " ++ show args
273 Nothing -> error $ "Using function from another module that is not a known builtin: " ++ pprString f
274 IdInfo.NotGlobalId -> do
275 signatures <- getA vsSignatures
276 -- This is a local id, so it should be a function whose definition we
277 -- have and which can be turned into a component instantiation.
279 signature = Maybe.fromMaybe
280 (error $ "Using function '" ++ (varToString f) ++ "' without signature? This should not happen!")
281 (Map.lookup f signatures)
282 entity_id = ent_id signature
283 -- TODO: Using show here isn't really pretty, but we'll need some
284 -- unique-ish value...
285 label = "comp_ins_" ++ (either show show) dst
286 portmaps = mkAssocElems (map (either exprToVHDLExpr id) args) ((either varToVHDLName id) dst) signature
288 return [mkComponentInst label entity_id portmaps]
289 details -> error $ "Calling unsupported function " ++ pprString f ++ " with GlobalIdDetails " ++ pprString details
291 -----------------------------------------------------------------------------
292 -- Functions to generate functions dealing with vectors.
293 -----------------------------------------------------------------------------
295 -- Returns the VHDLId of the vector function with the given name for the given
296 -- element type. Generates -- this function if needed.
297 vectorFunId :: Type.Type -> String -> VHDLSession AST.VHDLId
298 vectorFunId el_ty fname = do
299 elemTM <- vhdl_ty el_ty
300 -- TODO: This should not be duplicated from mk_vector_ty. Probably but it in
301 -- the VHDLState or something.
302 let vectorTM = mkVHDLExtId $ "vector_" ++ (AST.fromVHDLId elemTM)
303 typefuns <- getA vsTypeFuns
304 case Map.lookup (OrdType el_ty, fname) typefuns of
305 -- Function already generated, just return it
306 Just (id, _) -> return id
307 -- Function not generated yet, generate it
309 let functions = genUnconsVectorFuns elemTM vectorTM
310 case lookup fname functions of
312 modA vsTypeFuns $ Map.insert (OrdType el_ty, fname) (function_id, body)
314 Nothing -> error $ "I don't know how to generate vector function " ++ fname
316 function_id = mkVHDLExtId fname
318 genUnconsVectorFuns :: AST.TypeMark -- ^ type of the vector elements
319 -> AST.TypeMark -- ^ type of the vector
320 -> [(String, AST.SubProgBody)]
321 genUnconsVectorFuns elemTM vectorTM =
322 [ (exId, AST.SubProgBody exSpec [] [exExpr])
323 , (replaceId, AST.SubProgBody replaceSpec [AST.SPVD replaceVar] [replaceExpr,replaceRet])
324 , (headId, AST.SubProgBody headSpec [] [headExpr])
325 , (lastId, AST.SubProgBody lastSpec [] [lastExpr])
326 , (initId, AST.SubProgBody initSpec [AST.SPVD initVar] [initExpr, initRet])
327 , (tailId, AST.SubProgBody tailSpec [AST.SPVD tailVar] [tailExpr, tailRet])
328 , (takeId, AST.SubProgBody takeSpec [AST.SPVD takeVar] [takeExpr, takeRet])
329 , (dropId, AST.SubProgBody dropSpec [AST.SPVD dropVar] [dropExpr, dropRet])
330 , (plusgtId, AST.SubProgBody plusgtSpec [AST.SPVD plusgtVar] [plusgtExpr, plusgtRet])
331 , (emptyId, AST.SubProgBody emptySpec [AST.SPCD emptyVar] [emptyExpr])
332 , (singletonId, AST.SubProgBody singletonSpec [AST.SPVD singletonVar] [singletonRet])
333 , (copyId, AST.SubProgBody copySpec [AST.SPVD copyVar] [copyExpr])
336 ixPar = AST.unsafeVHDLBasicId "ix"
337 vecPar = AST.unsafeVHDLBasicId "vec"
338 nPar = AST.unsafeVHDLBasicId "n"
339 iId = AST.unsafeVHDLBasicId "i"
341 aPar = AST.unsafeVHDLBasicId "a"
342 resId = AST.unsafeVHDLBasicId "res"
343 exSpec = AST.Function (mkVHDLExtId exId) [AST.IfaceVarDec vecPar vectorTM,
344 AST.IfaceVarDec ixPar naturalTM] elemTM
345 exExpr = AST.ReturnSm (Just $ AST.PrimName $ AST.NIndexed
346 (AST.IndexedName (AST.NSimple vecPar) [AST.PrimName $
348 replaceSpec = AST.Function (mkVHDLExtId replaceId) [ AST.IfaceVarDec vecPar vectorTM
349 , AST.IfaceVarDec iPar naturalTM
350 , AST.IfaceVarDec aPar elemTM
352 -- variable res : fsvec_x (0 to vec'length-1);
355 (AST.SubtypeIn vectorTM
356 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
357 [AST.ToRange (AST.PrimLit "0")
358 (AST.PrimName (AST.NAttribute $
359 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
360 (AST.PrimLit "1")) ]))
362 -- res AST.:= vec(0 to i-1) & a & vec(i+1 to length'vec-1)
363 replaceExpr = AST.NSimple resId AST.:=
364 (vecSlice (AST.PrimLit "0") (AST.PrimName (AST.NSimple iPar) AST.:-: AST.PrimLit "1") AST.:&:
365 AST.PrimName (AST.NSimple aPar) AST.:&:
366 vecSlice (AST.PrimName (AST.NSimple iPar) AST.:+: AST.PrimLit "1")
367 ((AST.PrimName (AST.NAttribute $
368 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing))
369 AST.:-: AST.PrimLit "1"))
370 replaceRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
371 vecSlice init last = AST.PrimName (AST.NSlice
374 (AST.ToRange init last)))
375 headSpec = AST.Function (mkVHDLExtId headId) [AST.IfaceVarDec vecPar vectorTM] elemTM
377 headExpr = AST.ReturnSm (Just $ (AST.PrimName $ AST.NIndexed (AST.IndexedName
378 (AST.NSimple vecPar) [AST.PrimLit "0"])))
379 lastSpec = AST.Function (mkVHDLExtId lastId) [AST.IfaceVarDec vecPar vectorTM] elemTM
380 -- return vec(vec'length-1);
381 lastExpr = AST.ReturnSm (Just $ (AST.PrimName $ AST.NIndexed (AST.IndexedName
383 [AST.PrimName (AST.NAttribute $
384 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing)
385 AST.:-: AST.PrimLit "1"])))
386 initSpec = AST.Function (mkVHDLExtId initId) [AST.IfaceVarDec vecPar vectorTM] vectorTM
387 -- variable res : fsvec_x (0 to vec'length-2);
390 (AST.SubtypeIn vectorTM
391 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
392 [AST.ToRange (AST.PrimLit "0")
393 (AST.PrimName (AST.NAttribute $
394 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
395 (AST.PrimLit "2")) ]))
397 -- resAST.:= vec(0 to vec'length-2)
398 initExpr = AST.NSimple resId AST.:= (vecSlice
400 (AST.PrimName (AST.NAttribute $
401 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing)
402 AST.:-: AST.PrimLit "2"))
403 initRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
404 tailSpec = AST.Function (mkVHDLExtId tailId) [AST.IfaceVarDec vecPar vectorTM] vectorTM
405 -- variable res : fsvec_x (0 to vec'length-2);
408 (AST.SubtypeIn vectorTM
409 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
410 [AST.ToRange (AST.PrimLit "0")
411 (AST.PrimName (AST.NAttribute $
412 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
413 (AST.PrimLit "2")) ]))
415 -- res AST.:= vec(1 to vec'length-1)
416 tailExpr = AST.NSimple resId AST.:= (vecSlice
418 (AST.PrimName (AST.NAttribute $
419 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing)
420 AST.:-: AST.PrimLit "1"))
421 tailRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
422 takeSpec = AST.Function (mkVHDLExtId takeId) [AST.IfaceVarDec nPar naturalTM,
423 AST.IfaceVarDec vecPar vectorTM ] vectorTM
424 -- variable res : fsvec_x (0 to n-1);
427 (AST.SubtypeIn vectorTM
428 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
429 [AST.ToRange (AST.PrimLit "0")
430 ((AST.PrimName (AST.NSimple nPar)) AST.:-:
431 (AST.PrimLit "1")) ]))
433 -- res AST.:= vec(0 to n-1)
434 takeExpr = AST.NSimple resId AST.:=
435 (vecSlice (AST.PrimLit "1")
436 (AST.PrimName (AST.NSimple $ nPar) AST.:-: AST.PrimLit "1"))
437 takeRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
438 dropSpec = AST.Function (mkVHDLExtId dropId) [AST.IfaceVarDec nPar naturalTM,
439 AST.IfaceVarDec vecPar vectorTM ] vectorTM
440 -- variable res : fsvec_x (0 to vec'length-n-1);
443 (AST.SubtypeIn vectorTM
444 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
445 [AST.ToRange (AST.PrimLit "0")
446 (AST.PrimName (AST.NAttribute $
447 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing) AST.:-:
448 (AST.PrimName $ AST.NSimple nPar)AST.:-: (AST.PrimLit "1")) ]))
450 -- res AST.:= vec(n to vec'length-1)
451 dropExpr = AST.NSimple resId AST.:= (vecSlice
452 (AST.PrimName $ AST.NSimple nPar)
453 (AST.PrimName (AST.NAttribute $
454 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing)
455 AST.:-: AST.PrimLit "1"))
456 dropRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
457 plusgtSpec = AST.Function (mkVHDLExtId plusgtId) [AST.IfaceVarDec aPar elemTM,
458 AST.IfaceVarDec vecPar vectorTM] vectorTM
459 -- variable res : fsvec_x (0 to vec'length);
462 (AST.SubtypeIn vectorTM
463 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
464 [AST.ToRange (AST.PrimLit "0")
465 (AST.PrimName (AST.NAttribute $
466 AST.AttribName (AST.NSimple vecPar) (mkVHDLBasicId lengthId) Nothing))]))
468 plusgtExpr = AST.NSimple resId AST.:=
469 ((AST.PrimName $ AST.NSimple aPar) AST.:&:
470 (AST.PrimName $ AST.NSimple vecPar))
471 plusgtRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
472 emptySpec = AST.Function (mkVHDLExtId emptyId) [] vectorTM
475 (AST.SubtypeIn vectorTM Nothing)
476 (Just $ AST.PrimLit "\"\"")
477 emptyExpr = AST.ReturnSm (Just $ AST.PrimName (AST.NSimple resId))
478 singletonSpec = AST.Function (mkVHDLExtId singletonId) [AST.IfaceVarDec aPar elemTM ]
480 -- variable res : fsvec_x (0 to 0) := (others => a);
483 (AST.SubtypeIn vectorTM
484 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
485 [AST.ToRange (AST.PrimLit "0") (AST.PrimLit "0")]))
486 (Just $ AST.Aggregate [AST.ElemAssoc (Just AST.Others)
487 (AST.PrimName $ AST.NSimple aPar)])
488 singletonRet = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
489 copySpec = AST.Function (mkVHDLExtId copyId) [AST.IfaceVarDec nPar naturalTM,
490 AST.IfaceVarDec aPar elemTM ] vectorTM
491 -- variable res : fsvec_x (0 to n-1) := (others => a);
494 (AST.SubtypeIn vectorTM
495 (Just $ AST.ConstraintIndex $ AST.IndexConstraint
496 [AST.ToRange (AST.PrimLit "0")
497 ((AST.PrimName (AST.NSimple nPar)) AST.:-:
498 (AST.PrimLit "1")) ]))
499 (Just $ AST.Aggregate [AST.ElemAssoc (Just AST.Others)
500 (AST.PrimName $ AST.NSimple aPar)])
502 copyExpr = AST.ReturnSm (Just $ AST.PrimName $ AST.NSimple resId)
504 -----------------------------------------------------------------------------
505 -- A table of builtin functions
506 -----------------------------------------------------------------------------
508 -- | The builtin functions we support. Maps a name to an argument count and a
510 globalNameTable :: NameTable
511 globalNameTable = Map.fromList
512 [ (exId , (2, genFCall ) )
513 , (replaceId , (3, genFCall ) )
514 , (headId , (1, genFCall ) )
515 , (lastId , (1, genFCall ) )
516 , (tailId , (1, genFCall ) )
517 , (initId , (1, genFCall ) )
518 , (takeId , (2, genFCall ) )
519 , (dropId , (2, genFCall ) )
520 , (plusgtId , (2, genFCall ) )
521 , (mapId , (2, genMap ) )
522 , (zipWithId , (3, genZipWith ) )
523 --, (foldlId , (3, genFoldl ) )
524 , (emptyId , (0, genFCall ) )
525 , (singletonId , (1, genFCall ) )
526 , (copyId , (2, genFCall ) )
527 , (hwxorId , (2, genOperator2 AST.Xor ) )
528 , (hwandId , (2, genOperator2 AST.And ) )
529 , (hworId , (2, genOperator2 AST.Or ) )
530 , (hwnotId , (1, genOperator1 AST.Not ) )