both application programmers and compiler designers.
\begin{figure}
- \epsfig{file=Img/MontiumOverview.eps, width=.5\textwidth}
+ %\epsfig{file=Img/MontiumOverview.eps, width=.5\textwidth}
\caption{Overview of the Montium design}
\end{figure}
addresses, only modifications to the current address. Each memory simply reads
from its current address and offers the value read to the interconnect (which
can then further distribute it to wherever it is needed). Writing works in the
-same way (though a memory can only be read or written to in the same cycle).
+same way (though a memory can only be read from or written to in the same cycle).
\subsubsection{ALU's}
The main processing elements of the Montium are its 5 ALU's. Each of them has
four (16 bit) inputs, each with a number of input registers. Each ALU contains a
number of function units, a multiplier, a few adders and some miscellaneous
-logic. Each of the elements in the ALU can be controlled seperately and data can
+logic. Each of the elements in the ALU can be controlled separately and data can
be routed in different ways by configuration of multiplexers inside the
ALU. The ALU has two output ports, without registers. Additionally, there is a
connection from each ALU to its neighbour.
clock speeds. In the new design, the number of ALUs is reduced, but each ALU is
subdivided in multiple parallel operating function units. Also, the Montium has
only very limited support for control flow, making it hard to program it for
-data dependent control and synchronization, which ask for improvements.
+data dependent control and synchronization, which asks for improvements.
This approach requires computations to be properly pipelined to efficiently
use all those function units in parallel, but since data only travels through