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Give a proper error when a vector of an empty type is used.
[matthijs/master-project/cλash.git]
/
cλash
/
CLasH
/
VHDL
/
Generate.hs
2010-03-03
Matthijs Kooijman
Give a proper error when a vector of an empty type...
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2009-11-30
Matthijs Kooijman
Merge branch 'master' of git://github.com/christiaanb...
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2009-11-25
Christiaan Baaij
Multiplications are now resized to mimic the behaviour...
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2009-11-11
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-11-11
Christiaan Baaij
Clean up source files:
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2009-11-10
Christiaan Baaij
Use data-accessor-transformers package to remove deprec...
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2009-11-10
Christiaan Baaij
Fixed VHDL Type generation, vhdlTy now uses HType's...
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2009-11-06
Christiaan Baaij
Start support on initial state. Substates currently...
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2009-11-06
Christiaan Baaij
Add built-in split function
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2009-09-28
Christiaan Baaij
Fix error message genNegation for non-SizedWord types
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2009-09-23
Christiaan Baaij
Fix bug with generating head and tail functions. Update...
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2009-09-09
Christiaan Baaij
Fail again when we try translate a DEFAULT condition
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2009-09-09
Christiaan Baaij
Add some comments
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2009-09-09
Christiaan Baaij
Add support for multiple alts in case statements
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2009-09-09
Christiaan Baaij
Add support for enumeration types.
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2009-09-08
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-09-08
Christiaan Baaij
Add support for fromIntegerT
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2009-09-08
Christiaan Baaij
Add some gt,lt,gteq and lteq boolean operators
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2009-09-01
Matthijs Kooijman
Merge branch 'master' of git://github.com/christiaanb...
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2009-08-29
Christiaan Baaij
Use boolean as write enable signal
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2009-08-28
Matthijs Kooijman
Fix typo.
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2009-08-28
Matthijs Kooijman
Merge branch 'master' of git://github.com/christiaanb...
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2009-08-20
Christiaan Baaij
Connect resetn port to states.
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2009-08-20
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-08-19
Matthijs Kooijman
Merge branch 'master' of git://github.com/christiaanb...
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2009-08-18
Christiaan Baaij
Used unsigned instead of natural as representation...
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2009-08-17
Christiaan Baaij
Add resetn ports
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2009-08-17
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-08-14
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-08-14
Christiaan Baaij
Fix replace function to make Quartus II happy
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2009-08-14
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-08-14
Christiaan Baaij
Ignore casts that just repack state. Don't make VHDL...
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2009-08-14
Christiaan Baaij
Add builtin blockRAM primitive
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2009-08-14
Matthijs Kooijman
Merge branch 'master' of git://github.com/christiaanb...
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2009-08-14
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-08-14
Matthijs Kooijman
Be more strict in state recognition.
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2009-08-13
Christiaan Baaij
Hopefully generate completely unique varNames now ...
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2009-08-13
Christiaan Baaij
Merge branch 'cλash' of git.stderr.nl/matthijs/projects...
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2009-08-13
Christiaan Baaij
Generate more unique variable names, generate truely...
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2009-08-13
Matthijs Kooijman
Don't generate a state proc for an empty state.
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2009-08-13
Matthijs Kooijman
Add and use splitNormalized helper function.
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2009-08-13
Christiaan Baaij
Add boolean or and and, tuple fst and snd function.
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2009-08-13
Christiaan Baaij
Added equals builtin. And fixed show function generatio...
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2009-08-12
Matthijs Kooijman
Revert "Put mkAssocElems in the TranslatorSession."
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2009-08-12
Matthijs Kooijman
Revert "Don't generate VHDL for state packing."
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2009-08-12
Matthijs Kooijman
Generate a state proc for a stateful function.
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2009-08-12
Matthijs Kooijman
Make output ports optional.
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2009-08-12
Matthijs Kooijman
Fix comment.
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2009-08-07
Christiaan Baaij
We now use compileToCoreSimplified, I'm sure there...
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2009-08-06
Matthijs Kooijman
Merge branch 'master' of git://github.com/christiaanb...
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2009-08-06
Matthijs Kooijman
Filter out empty-typed binders in selector cases.
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2009-08-06
Matthijs Kooijman
Let argsToVHDLExpr ignore empty types.
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2009-08-06
Matthijs Kooijman
Rename eitherCoreOrExprArgs to argsToVHDLExprs.
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2009-08-06
Matthijs Kooijman
Put mkAssocElems in the TranslatorSession.
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2009-08-06
Matthijs Kooijman
Don't generate VHDL for substate extractor cases.
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2009-08-06
Matthijs Kooijman
Filtering out state arguments is no longer needed.
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2009-08-06
Matthijs Kooijman
Allow explicit empty VHDL types using Maybe.
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2009-08-06
Matthijs Kooijman
Don't generate input ports for State arguments.
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2009-08-06
Matthijs Kooijman
Don't generate VHDL for state packing.
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2009-08-05
Matthijs Kooijman
Merge branch 'master' of git://github.com/christiaanb...
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2009-08-05
Christiaan Baaij
Fix builtin functions (!),take and RangedWord
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2009-08-05
Matthijs Kooijman
Slightly simplify getEntity.
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2009-08-05
Matthijs Kooijman
Remove compatability aliases for the old sessions.
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2009-08-05
Matthijs Kooijman
Make vhdl generation and normalization lazy.
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2009-08-03
Matthijs Kooijman
Merge branch 'master' of git://github.com/christiaanb...
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2009-08-03
Christiaan Baaij
TFVec builtin should now completely work
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2009-08-02
Christiaan Baaij
Clean up imports in Generate.hs
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2009-07-31
Christiaan Baaij
Fail again when we find a global function
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2009-07-31
Christiaan Baaij
Partially fixed TFVec builtin function. Still needs...
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2009-07-31
Matthijs Kooijman
Merge branch 'master' of git://github.com/christiaanb...
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2009-07-31
Christiaan Baaij
Quick hack implementation of FSVec literals, needs...
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2009-07-29
Christiaan Baaij
We now make a show function for all default datatypes.
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2009-07-15
Christiaan Baaij
Adepted the modules to their new structure
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2009-07-15
Christiaan Baaij
Moved clash to it's own library directory, and started...
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