From: Matthijs Kooijman Date: Wed, 11 Nov 2009 09:55:59 +0000 (+0100) Subject: Add the prototype to the research goals. X-Git-Tag: final-thesis~162 X-Git-Url: https://git.stderr.nl/gitweb?a=commitdiff_plain;h=9a64968e619e6cf17f914e59f90e1d4996e8724c;p=matthijs%2Fmaster-project%2Freport.git Add the prototype to the research goals. --- diff --git a/Chapters/Introduction.tex b/Chapters/Introduction.tex index 0f0097b..b5e2e24 100644 --- a/Chapters/Introduction.tex +++ b/Chapters/Introduction.tex @@ -185,13 +185,20 @@ sum' (x:xs) acc = acc' : (sum' xs acc') \item How can we describe (hierarchical) structure in a design? \stopitemize - functional perspective: + And subquestions from a functional perspective: \startitemize \item How to interpret recursion in descriptions? \item How to interpret polymorphism? \item How to interpret higher order in descriptions? \stopitemize + In addition to looking at designing a hardware description language, we + will also implement a prototype to test drive our ideas. This prototype will + translate hardware descriptions written in the Haskell functional language + to simple (netlist-like) hardware descriptions in the \VHDL language. The + reasons for choosing these languages are detailed in section + \in{}[sec:prototype:input] and \in{}[sec:prototype:output] respectively. + \section{Outline} In the first chapter, we will sketch the context for this research. diff --git a/Chapters/Prototype.tex b/Chapters/Prototype.tex index adae92c..257328e 100644 --- a/Chapters/Prototype.tex +++ b/Chapters/Prototype.tex @@ -11,7 +11,7 @@ has gone through a number of design iterations which we will not completely describe here. - \section{Input language} + \section[sec:prototype:input]{Input language} When implementing this prototype, the first question to ask is: What (functional) language will we use to describe our hardware? (Note that this does not concern the \emph{implementation language} of the compiler, @@ -50,7 +50,7 @@ TODO: Was Haskell really a good choice? Perhaps say this somewhere else? - \subsection{Output format} + \subsection[sec:prototype:output]{Output format} The second important question is: What will be our output format? Since our prototype won't be able to program FPGA's directly, we'll have to have output our hardware in some format that can be later processed and