- \item We designed a matrix reduction circuit\pause
- \item Simulation results in Haskell match VHDL simulation results
- \item Synthesis completes without errors or warnings
- \item It runs at half the speed of a hand-coded VHDL design
+ \item We implemented a reduction circuit in \clash{}\pause
+ \item Simulation results in Haskell match VHDL simulation results\pause
+ \item Synthesis completes without errors or warnings\pause
+ \item Around half speed of handcoded and optimized VHDL