1 {-# LANGUAGE TemplateHaskell, DeriveDataTypeable #-}
3 module CLasH.HardwareTypes
5 , module Data.Param.Integer
6 , module Data.Param.Vector
7 , module Data.Param.Index
8 , module Data.Param.Signed
9 , module Data.Param.Unsigned
23 import qualified Prelude as P
24 import Prelude (Bool(..),Num(..),Eq(..),Ord(..),snd,fst,otherwise,(&&),(||),not)
26 import Data.Param.Integer (HWBits(..))
27 import Data.Param.Vector
28 import Data.Param.Index
29 import Data.Param.Signed
30 import Data.Param.Unsigned
31 import Data.Bits hiding (shiftL,shiftR)
33 import Language.Haskell.TH.Lift
36 newtype State s = State s deriving (P.Show)
40 deriving (P.Show, Eq, P.Read, Typeable)
44 hwand :: Bit -> Bit -> Bit
45 hwor :: Bit -> Bit -> Bit
46 hwxor :: Bit -> Bit -> Bit
49 High `hwand` High = High
56 High `hwxor` Low = High
57 Low `hwxor` High = High
63 type RAM s a = Vector s a
64 type MemState s a = State (RAM s a)
74 blockRAM (State mem) data_in rdaddr wraddr wrenable =
75 ((State mem'), data_out)
78 -- Only write data_in to memory if write is enabled
79 mem' = if wrenable then
80 replace mem wraddr data_in